TC74VHC368FK Overview
They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. They contain six buffers; four buffers are controlled by an enable input ( G1 ), and the other two buffers are controlled by another enable input ( G2.
TC74VHC368FK Key Features
- High speed: tpd = 3.8 ns (typ.) at VCC = 5 V
- Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
- High noise immunity: VNIH = VNIL = 28% VCC (min)
- Power down protection is provided on all inputs
- Balanced propagation delays: tpLH ∼- tpHL
- Wide operating voltage range: VCC (opr) = 2 V to 5.5 V
- Low noise: VOLP = 0.8 V (max)
- Pin and function patible with 74ALS367/368