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TC74VHC373F - Octal D-Type Latch

Datasheet Summary

Features

  • High speed: tpd = 5.0 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Power down protection is provided on all inputs.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
  • Low noise: VOLP = 0.8 V (max).
  • Pin and function compatible with 74ALS373 Weight SOP20-P-300-1.27A VSSOP20-P-0030-0.50 : 0.22 g (typ. ) : 0.03 g (typ. ) ©.

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Datasheet preview – TC74VHC373F

Datasheet Details

Part number TC74VHC373F
Manufacturer Toshiba
File Size 259.81 KB
Description Octal D-Type Latch
Datasheet download datasheet TC74VHC373F Datasheet
Additional preview pages of the TC74VHC373F datasheet.

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Full PDF Text Transcription

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TC74VHC373F/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC373F, TC74VHC373FK Octal D-Type Latch with 3-State Output The TC74VHC373 is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.
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