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TC74VHC373FW - OCTAL D-TYPE LATCH WITH 3-STATE OUTPUT

Datasheet Summary

Features

  • High speed: tpd = 5.0 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 µA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Power down protection is provided on all inputs.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
  • Low noise: VOLP = 0.9 V (max).
  • Pin and function compatible with 74ALS373 Note: xxxFW (JEDEC SOP) is not available in Japa.

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Datasheet Details

Part number TC74VHC373FW
Manufacturer Toshiba
File Size 295.67 KB
Description OCTAL D-TYPE LATCH WITH 3-STATE OUTPUT
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TC74VHC373F/FW/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC373F,TC74VHC373FW,TC74VHC373FT Octal D-Type Latch with 3-State Output The TC74VHC373 is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and a output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage.
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