TC74VHCT573AFK Description
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state.
TC74VHCT573AFK Key Features
- High speed: tpd 7.7 ns (typ.) at VCC 5 V
- Low power dissipation: ICC 4 A (max) at Ta 25°C
- patible with TTL inputs
- Power down protection is provided on all inputs and outputs
- Balanced propagation delays: tpLH tpHL
- Low noise: VOLP 1.5 V (max)
- Pin and function patible with the 74 series (74AC/HC/F/ALS/LS etc.) 573 type