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TC7WH00FK - Dual 2-Input NAND Gate

General Description

2.

Key Features

  • (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature range: Topr = -40 to 125  (Note 2) (3) High speed operation: tpd = 3.7 ns (typ. ) (VCC = 5.0 V, CL = 15 pF) (4) Low power dissipation: ICC = 2.0 µA (max) (Ta = 25 ) (5) High noise immunity: VNIH = VNIL = 28 % VCC (min) (6) 5.5 V tolerant inputs (7) Balanced propagation delays: tPLH ≈ tPHL (8) Wide operating voltage range: VCC = 2.0 to 5.5 V (9) Identical pin assignment and function with TC7W00 Note 1: This device is compliant with th.

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Datasheet Details

Part number TC7WH00FK
Manufacturer Toshiba
File Size 136.87 KB
Description Dual 2-Input NAND Gate
Datasheet download datasheet TC7WH00FK Datasheet

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CMOS Digital Integrated Circuits Silicon Monolithic TC7WH00FK TC7WH00FK 1. Functional Description • Dual 2-Input NAND Gate 2. Features (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature range: Topr = -40 to 125  (Note 2) (3) High speed operation: tpd = 3.7 ns (typ.) (VCC = 5.0 V, CL = 15 pF) (4) Low power dissipation: ICC = 2.0 µA (max) (Ta = 25 ) (5) High noise immunity: VNIH = VNIL = 28 % VCC (min) (6) 5.5 V tolerant inputs (7) Balanced propagation delays: tPLH ≈ tPHL (8) Wide operating voltage range: VCC = 2.0 to 5.5 V (9) Identical pin assignment and function with TC7W00 Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. Note 2: For devices with the ordering part number ending in J(CT.