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INTEGRATEDCIRCUIT
TECH NICAl DATA
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT
TMP8085AP
N-CHANNEL SILICON GATE MOS
8-BIT SINGLE CHIP MICROPROCESSOR
GENERAL DESCRIPTION
The TMPSOS5AP, from here on referred to as the TMPSOS5A, is a new generation, complete S bit parallel central processing unit (CPU). Its instruction set is 100% software compatible with the TMP90S0A (SOSOA) microprocessor, and it is designed to improve the present 90S0's performance by higher system speed. Its high level of system integration allows a minimum system of there IC's : TMPSOS5A (CPU), TMPSI55P/TMPS156P (RAM/IO) and TMPS755AC (EPROM/IO)/ TMPS355P (ROM/IO). The TMPSOS5A uses a mUltiplexed data bus. The address is plit between the S bit address bus and the S bit data bus.