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TMP8085AP - 8-BIT SINGLE CHIP MICROPROCESSOR

General Description

The TMPSOS5AP, from here on referred to as the TMPSOS5A, is a new generation, complete S bit parallel central processing unit (CPU).

Key Features

  • 100% Software Compatible with TMP90S0A 1.3 s Instruction Cycle Single +5V Power Supply On-Chip Clock Generator (with External Crystal or RC Network) On-Chip System Controller; Advanced Cycle status information available for Large System Control 4 Vectored Interrupts (One is Non-Maskable) Plus an TMP90S0A compatible interrupt Decimal, Binary and Double Precision Arithmetic Serial In/Serial Out Port Direct Addressing Capability to 64K Bytes of Memory Compatible with Intel's SOS5A PIN.

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Datasheet Details

Part number TMP8085AP
Manufacturer Toshiba
File Size 1.17 MB
Description 8-BIT SINGLE CHIP MICROPROCESSOR
Datasheet download datasheet TMP8085AP Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATEDCIRCUIT TECH NICAl DATA TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TMP8085AP N-CHANNEL SILICON GATE MOS 8-BIT SINGLE CHIP MICROPROCESSOR GENERAL DESCRIPTION The TMPSOS5AP, from here on referred to as the TMPSOS5A, is a new generation, complete S bit parallel central processing unit (CPU). Its instruction set is 100% software compatible with the TMP90S0A (SOSOA) microprocessor, and it is designed to improve the present 90S0's performance by higher system speed. Its high level of system integration allows a minimum system of there IC's : TMPSOS5A (CPU), TMPSI55P/TMPS156P (RAM/IO) and TMPS755AC (EPROM/IO)/ TMPS355P (ROM/IO). The TMPSOS5A uses a mUltiplexed data bus. The address is plit between the S bit address bus and the S bit data bus.