Datasheet4U Logo Datasheet4U.com

TMP92CF30FG - 32-Bit Microcontroller

Features

  • The TMP92CF30 is a high-speed advanced 32-bit microcontroller developed for controlling equipment which processes mass data. The TMP92CF30FG is housed in a 176-pin QFP package. (1) CPU: 32-bit CPU (High-speed 900/H1 CPU).
  • Compatible with TLCS-900/L1 instruction code.
  • 16 Mbytes of linear address space.
  • General-purpose register and register banks.
  • Micro DMA: 8channels (62.5 ns/4 bytes at fSYS = 80 MHz, best case) (2) Minimum instruction execution time : 12.5 ns.

📥 Download Datasheet

Datasheet preview – TMP92CF30FG

📁 Similar Datasheet

  • TMP92CF26AXBG - Original CMOS 32-Bit Microcontroller (Toshiba Semiconductor)
  • TMP92CA25FG - Original CMOS 32-Bit Microcontroller (Toshiba Semiconductor)
  • TMP92CD54IF - 32-bit Micro-controller (Toshiba Semiconductor)
  • TMP92CM27 - CMOS 32-Bit Microcontroller (Toshiba Semiconductor)
  • TMP92CZ26AXBG - CMOS 32-Bit Microcontroller (Toshiba Semiconductor)
  • TMP92FD54AIF - CMOS 32-bit Micro-controller (Toshiba Semiconductor)
  • TMP90C041-15 - CMOS 8-BIT MICROCONTROLLERS (Toshiba Semiconductor)
  • TMP91CP27 - CMOS 16-Bit Microcontroller (Toshiba Semiconductor)
  • TMP91CW28 - CMOS 16-Bit Microcontroller (Toshiba Semiconductor)
  • TMP91CY22IFG - Original CMOS 16-Bit Microcontroller (Toshiba Semiconductor)
Other Datasheets by Toshiba

Full PDF Text Transcription

Click to expand full text
TOSHIBA Original CMOS 32-Bit Microcontroller TLCS-900/H1 Series TMP92CF30FG Semiconductor Company Preface Thank you very much for making use of Toshiba microcomputer LSIs. Before use this LSI, refer the section, “Notes and Restrictions”. TMP92CF30 CMOS 32-Bit Microcontroller TMP92CF30FG 1. Outline and Features The TMP92CF30 is a high-speed advanced 32-bit microcontroller developed for controlling equipment which processes mass data. The TMP92CF30FG is housed in a 176-pin QFP package. (1) CPU: 32-bit CPU (High-speed 900/H1 CPU) • Compatible with TLCS-900/L1 instruction code • 16 Mbytes of linear address space • General-purpose register and register banks • Micro DMA: 8channels (62.5 ns/4 bytes at fSYS = 80 MHz, best case) (2) Minimum instruction execution time : 12.
Published: |