TXC-03456 Datasheet | Transwitch

FEATURES h S a at .D w w w L4M Device Level 4 Mapper TXC-03456 DATA SHEET DESCRIPTION The L4M device maps a 139.264 Mbit/s asynchronous line signal into an AU-4 VC-4/STS-3c SPE signal. The SDH/SONET signal is transmitted via the add bus with timing derived from the drop bus, add bus, or external clock source. The L4M can pensate for up to a frame offset when using external timing and an external C1 pulse. An option is provided to generate TOH bytes, such as the A1 and A2 framing bytes, a C1 byte, and the H1 and H2 pointer bytes only in drop bus and external timing modes. The VC-4/SPE can be fixed to a known J1 reference when add bus timing is selected, or it can be positioned with a pointer value of 0 or 522 when drop bus or external timing is selected. In the drop direction, an optional pointer tracking machine is provided. In this mode, the L4M can pensate for up to a frame in offset. External access is provided for the POH bytes, in addition to internal processing capability....