TXC-04212 Datasheet | Transwitch

FEATURES - Eight 10/100 Mbit/s Ethernet ports, each using a SMII interface - Single 1000 Mbit/s Ethernet port, using a parallel GMII interface (lead shared with SMII interfaces) - Ethernet Management interface for control and configuration of externally connected PHYs - GMII Mux-mode allowing multiple concatenation groups from one GMII - Supports IEEE 802.3 flow control (Half and Full-duplex) and management statistics (RMON) on 10/100/1000 Mbit/s Ethernet ports (100 Mbps full-duplex only) - Ethernet frame encapsulation/decapsulation protocols: - ITU-T G.7041, Generic Framing Procedure (GFP) - ITU-T X.86/X.85, Link Access Procedure SDH (LAPS) - ITU-T Q.922, Link Access Procedure Frame Mode (LAPF) - IETF RFC2878, Point-to-Point Protocol (PPP) with Bridging Control Protocol (BCP) support - Transparent HDLC processing - Performs mapping/demapping of encapsulated Ethernet frames into/from Low Order Virtual Concatenated - Payloads and High Order virtual and contiguous concatenated payloads - Dynamic bandwidth allocation using LCAS (ITU-T G.7042) for Low and High Order Virtual Concatenated payloads - Glueless memory interface to external SDRAMs (up to 256 Mb) - Low Order POH and Pointer processing for 336/252 VT/TUs - High Order POH and Pointer processing for STS-1/VC-3/ STS-3c/VC-4, STS-6c, STS-9c and STS-12c/VC4-4c - Byte-wide 77.76MHz Add /Drop Line Tele Bus interfaces - Per-port Ethernet side and SONET/SDH system side loopback for system level diagnostics - 16-bit wide microprocessor interface, selectable between Motorola or Intel - API based driver provided (parable with Ether Map-3) - Boundary scan (IEEE 1149.1 standard) - + 3.3V and +1.2V power supplies, 5V tolerant I/O leads - 580-lead Plastic Ball Grid Array Package (PBGA) DESCRIPTION The Ether Map™-12 is a highly integrated, STS-12/STM-4 rate SONET/SDH device that provides mapping of 10/100/1000 Mbps Ethernet traffic into SONET/SDH Transport structures. The Ether Map-12 has on the Ethernet side, either Eight...