Datasheet4U Logo Datasheet4U.com

TXC-04222 - 28-Channel Dual Bus High Density Mapper

General Description

The TEMx28 device is designed for add/drop multiplexer, terminal multiplexer, and dual and single unidirectional ring applications.

Up to 28 E1, DS1, or VT/TU payloads are mapped to and from VT1.5/TU-11s and VT2/TU-12s carried in an STM-1 VC-4 or STS-3 format.

Key Features

  • Add/drop up to 28 E1, DS1, or VT/TU payloads from two add and two drop STM-1/VC4, STS-3 buses.
  • Add bus and drop bus timing modes.
  • Cross mapping.

📥 Download Datasheet

Datasheet Details

Part number TXC-04222
Manufacturer Transwitch
File Size 4.46 MB
Description 28-Channel Dual Bus High Density Mapper
Datasheet download datasheet TXC-04222 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
TXC100 Single chip OOK/ASK/FSK Transmitter IC RFM
TXC101 Multi-channel High data rate Programmable RFM
TXC102 Multi-channel High tae rate Programmable RFM

Other Datasheets by Transwitch

Part Number Description
TXC-04226 Ethernet Into STS-3/STM-1 SONET/SDH Mapper
TXC-04228 E1Mx28 Device DS1 Mapper 28-Channel
TXC-04201B DS1MX7 Device DS1 Mapper 7-Channel
TXC-04212 Ethemet Into STS-12/STM-4 SONET/SDH Mapper
TXC-04216 E1Mx16 Device E1 Mapper 16-Channel

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TEMx28 Device 28 Channel Dual Bus High Density Mapper TXC-04222 DATA SHEET FEATURES • Add/drop up to 28 E1, DS1, or VT/TU payloads from two add and two drop STM-1/VC4, STS-3 buses • Add bus and drop bus timing modes • Cross mapping applications (DS1 mapped to/from VT2/TU-12s) • Selectable HDB3/B8ZS/AMI positive/negative rail, NRZ, or VT/TU interfaces per channel • H4 multiframe option in place of Telecom Bus V1 pulse • Digital desynchronizer • Drop buses are monitored for parity, loss of clock, and upstream AIS • Performance counters for pointer movements, BIP-2 errors, REI and coding violations • Single-bit or three-bit RDI operation per channel • Tandem connection capability per ETSI standards • J2 trail trace comparison option • Processor access to H1/H2, H4 overhead bytes, and V1/V2 a