TXC-05804 Description
Proprietary TranSwitch Corporation Information for use Solely by its Customers Interoperable with (TXC-05802B), The CUBIT-3™ is a single-chip VLSI solution for imple® menting low-cost ATM multiplexing and switching sysCUBIT-622 (TXC-05805), ASPEN (TXC-05810) tems, based on the CellBus® architecture. Such systems UTOPIA Level 1/2 interface (8/16-bit) with are constructed from a number of CellBus devices, all support...
TXC-05804 Key Features
- Interoperable with (TXC-05802B), The CUBIT-3™ is a single-chip VLSI solution for imple® menting low-cost ATM multiplexin
- UTOPIA Level 1/2 interface (8/16-bit) with are constructed from a number of CellBus devices, all support for 16 ports in
- Supports dual OC-3 steady state bidirectional CUBIT-3 supports unicast and multicast transfers, and traffic has all the
- Inlet-side address translation and routing header switch: cell address translation, cell routing, and outlet insertion,
- Programmable OAM cell routing directly to UTOPIA Level 1 and 2 (8/16-bit) pliant
- Outlet cell queuing, using external synchronous devices such as the PHAST®-12E (TXC-06212), SRAM (SSRAM) cell buffer PHA
- Ability to insert GFC field in real time and SARA® (TXC-05501B/05601B). On the switch side
- Support for Packet Discard (PD) in outlet the CUBIT-3 interfaces with any CellBus patible direction devices such as the
- Master CellBus arbiter included in each CUBIT-3
- Internal GTL+ transceivers for CellBus connection
TXC-05804 Applications
- Microprocessor control port, selectable for Intel