TXC-05806 Datasheet | Transwitch

.. Multi-PHY Cell Bus Access Device TXC-05806 DATA SHEET Features DESCRIPTION ASPEN Express Device The ASPEN Express device is a single-chip solution for - 622 Mbit/s bi-directional throughput implementing cost-effective ATM multiplexing and switching - UTOPIA Level 1/2 interface (8/16-bit) with support systems, based on the Cell Bus architecture. Such systems are for 64/124 ports at 50 MHz constructed from a number of CUBIT-3, CUBIT-Pro, - OAM Fault Management per ITU-T I.610 CUBIT-622, or ASPEN devices, all interconnected by a 37-line - UPC/NPC policing on ingress pliant with mon bus, the Cell Bus. The ASPEN Express provides state TM4.1 of the art traffic management to the Cell Bus family of ATM - Early Packet Discard (EPD) and Partial Packet switching devices. ASPEN Express supports unicast and Discard (PPD) in inlet and outlet direction multicast transfers, and has all necessary functions for - Dual Cell Bus interfaces for load sharing or implementing a switch: cell address translation, cell routing, redundancy policing and inlet/outlet cell queuing. The ASPEN Express - Inlet-side address translation and routing header offers dual Cell Bus interfaces to support load sharing or insertion redundancy. - Header translation for egress cells The ASPEN Express is designed to interface directly with - 512k cell shared SDRAM buffer memory UTOPIA Level 1/2, 8/16-bit pliant devices, such as the - Support for spatial multicast for 512 sessions with PHAST-3P (TXC-06203) and the PHAST-12E (TXC-06212) at header translation up to 50 MHz. On the switch side, the ASPEN Express - Support for over-reservation of GFR, UBR, and interfaces directly with Cell Bus devices such as the CUBIT-Pro VBR traffic (TXC-05802B), CUBIT-3 (TXC-05804), CUBIT-622 (TXC-05805) and ASPEN (TXC-05810B). - Minimum Cell Rate (MCR) guarantees for egress queues APPLICATIONS - Cell Bus traffic monitor mode including APS support and congestion control . - ATM Access...