Datasheet4U Logo Datasheet4U.com

TXC04251 - QT1M Device Quad T1 Mapper

This page provides the datasheet information for the TXC04251, a member of the TXC-04251 QT1M Device Quad T1 Mapper family.

Datasheet Summary

Description

The Quad T1 Mapper device is designed for add/drop multiplexer, terminal multiplexer, and dual and single unidirectional ring applications.

Four T1 1.544 Mbit/s signals are mapped to and from asynchronous 1.5 Virtual Tributaries (VT1.5s) or Tributary Unit-11s (TU-11s).

Features

  • Add/drop four 1.544 Mbit/s signals from an STS-1, an STS-3/AU-3, or an STM-1 VC-4.
  • Independent add and drop bus timing modes.
  • Selectable AMI or B8ZS positive/negative rail or NRZ T1 interface. Performance counter provided for coding violations.
  • Digital desynchronizer reduces systemic jitter in the presence of multiple pointer movements. A register is also provided to control the internal FIFO leak rate.
  • Drop buses are monitored for parity, loss of cl.

📥 Download Datasheet

Datasheet preview – TXC04251

Datasheet Details

Part number TXC04251
Manufacturer Transwitch
File Size 874.02 KB
Description QT1M Device Quad T1 Mapper
Datasheet download datasheet TXC04251 Datasheet
Additional preview pages of the TXC04251 datasheet.

📁 Similar Datasheet

  • TXC100 - Single chip OOK/ASK/FSK Transmitter IC (RFM)
  • TXC101 - Multi-channel High data rate Programmable (RFM)
  • TXC102 - Multi-channel High tae rate Programmable (RFM)
Other Datasheets by Transwitch
  • TXC04252 - QE1M Device Quad E1 Mapper
  • TXC04201B - DS1MX7 Device DS1 Mapper
  • TXC04212 - Ethemet Into STS-12/STM-4 SONET/SDH Mapper
  • TXC04216 - E1Mx16 Device E1 Mapper 16-Channel
  • TXC04218 - 8-Channel Dual Bus Mapper
  • TXC04222 - 28-Channel Dual Bus High Density Mapper
  • TXC04226 - Ethernet Into STS-3/STM-1 SONET/SDH Mapper
  • TXC04228 - E1Mx28 Device DS1 Mapper 28-Channel

Full PDF Text Transcription

Click to expand full text
QT1M Device Quad T1 Mapper TXC-04251 DATA SHEET FEATURES • Add/drop four 1.544 Mbit/s signals from an STS-1, an STS-3/AU-3, or an STM-1 VC-4 • Independent add and drop bus timing modes • Selectable AMI or B8ZS positive/negative rail or NRZ T1 interface. Performance counter provided for coding violations • Digital desynchronizer reduces systemic jitter in the presence of multiple pointer movements.
Published: |