TQ1089 Overview
The core of the TQ1089 is a Phase-Locked Loop (PLL) that continuously pares the reference clock (REFCLK) to the feedback clock (FBIN), maintaining a zero frequency difference between the two. Since one of the outputs is always connected to FBIN, the PLL keeps the propagation delay between the outputs and the reference clock within 350 ps +500 ps for the TQ1089 MC500, and within 350 ps +700 ps for the TQ1089 MC700....
TQ1089 Key Features
- Wide frequency range: 65 MHz to 90 MHz and 130 MHz to 180 MHz
- Output configurations: eight outputs at fREF two outputs at 2x fREF or nine outputs at 1/2 x fREF one output at fREF
- Low output-to-output skew: 150 ps (max) within a group
- Near-zero propagation delay -350 ps + 500 ps (max) or -350 ps +700 ps (max)
- TTL-patible with 30 mA output drive
- 28-pin J-lead surface-mount package
- Ideal for PowerPC ™-based designs