TQ1090 - 11-Output Configurable Clock Buffer

TriQuint Semiconductor

Description

The core of the TQ1090 is a Phase-Locked Loop (PLL) that continuously compares the reference clock (REFCLK) to the feedback clock (FBIN), maintaining a zero frequency difference between the two.

Features

Q0 14 GND 15 Q1 Q2 16 17 MUX Divide Logic ÷2 Output Buffers Group C Group A Group B 1 GND 28 27 S1 S0 Q8 Q7 VDD 18 26 VDD.
Wide frequency range: 33 MHz to 45 MHz 65 MHz to 90 MHz and 130 MHz to 180 MHz.
Output configurations: four outputs at fREF four outputs at 2x fREF two output at 4x fREF or five outputs at 1/2 x fREF three outputs at fREF two outputs at 2x fREF.
Selectable Phase Shift:.
2t,.
t, 0, +t (t = 1/fvco).
Low output-to-ou.