UR5595 - DDR TERMINATION REGULATOR

Product Overview

UTC

UR5595 DDR TERMINATION REGULATOR by UTC - Datasheet Preview — Datasheet preview – UR5595

Datasheet Details

Part number	UR5595
Manufacturer	UTC
File Size	317.37 KB
Description	DDR TERMINATION REGULATOR
Datasheet	UR5595 Datasheet
Additional preview pages of the UR5595 datasheet.

Product details

Description

The UTC UR5595 is a linear bus termination regulator designed to meet JEDEC SSTL-2 and SSTL-3 (Stub Series Terminated Logic) specifications for termination of DDR-SDRAM.

Features

S.
Power regulating with driving and sinking capability.
Low output voltage offset.
No external resistors required.
Low external component count.
Linear topology.
Low cost and easy to use.
Thermal shutdown protection.

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Other Datasheets by UTC

UR5596 - DDR TERMINATION REGULATOR
UR5512 - 2A DDR BUS TERMINATION REGULATOR
UR5515 - 1.5A/3A BUS TERMINATION REGULATOR
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UR5516A - 3A BUS TERMINATION REGULATOR
UR5516B - 3A BUS TERMINATION REGULATOR

Published: Apr 10, 2007 |