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U74LVC126A - QUADRUPLE BUS BUFFER GATES

General Description

The U74LVC126A are quadruple bus buffer gates featuring independent line drivers with 3-state outputs.

When OE is low, the nY outputs are in a high-impedance state.

When OE is high, the device passes non-inverted data from the nA input to its nY output.

Key Features

  • S.
  • 1.65V to 3.6V VCC Operation.
  • Max tPD of 4.7ns from A to Y at VCC = 3.3V, CL = 50pF, RL = 500Ω.
  • ±24mA output driver at 3V.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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UNISONIC TECHNOLOGIES CO., LTD U74LVC126A QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS  DESCRIPTION The U74LVC126A are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. When OE is low, the nY outputs are in a high-impedance state. When OE is high, the device passes non-inverted data from the nA input to its nY output. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull-down resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3V to 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.  FEATURES * 1.65V to 3.6V VCC Operation * Max tPD of 4.