UT62W1024 Datasheet | Utron technology

SCRIPTION REV. 0.9 Original. REV. 1.0 1. The symbols CE1# ,OE# & WE# are revised as CE , OE & 2. Icc1 is revise as Icc. 3. Icc2 is revise as Icc1. REV. 1.1 Add order information for lead free product 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM . DATE Mar.15. 2001 Jul. 06. 2001 May. 16. 2003 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 P80056  UTRON Rev. 1.1 .. 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM GENERAL DESCRIPTION The UT62W1024 is a 1,048,576-bit low power CMOS static random access memory organized as 131,072 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. The UT62W1024 is designed for low power application. It is particularly well suited for battery back-up nonvolatile memory application. The UT62W1024 operates from a wide range of 2.7V~ 5.5V power supply and all inputs and outputs are fully TTL patible. Features - - - - - - - - Access time : 35/55/70ns (max.) Low power consumption : Operating : 60/50/40 m A (typical) Standby : 10µA (typical) L-version 1µA (typical) LL-version Wide range power supply : 2.7V to 5.5V All inputs and outputs TTL patible Fully static operation Three state outputs Data retention voltage : 2V (min.) Package : 32-pin 600 mil PDIP 32-pin 450 mil SOP 32-pin 8x20mm TSOP-1 32-pin 8x13.4mm STSOP PIN CONFIGURATION NC A16 A14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Vcc A15 CE2 FUNCTIONAL BLOCK DIAGRAM 1024 X 1024 MEMORY ARRAY A12 A7 A6 A5 A0-A16 DECODER A13 A8 A9 A11 Vcc Vss A4 A3 A2 A1 A0 A10 I/O8 I/O7 I/O6 I/O5...