V6300 Datasheet | Vango Technologies

Description Initial release Specified V6300 acpanied with V6000 (Driving capability: 4 A) Vango Technologies, Inc. -1- V6300 Datasheet Narrowband Power Line munication Processor General Description The V6300 is a narrowband Power Line munication (PLC) processor chip. The V6300 integrates one 32-bit MCU, one 32-bit DSP, one embedded Flash memory, two UART interfaces, one SPI Master controller, one SPI Slave interface, one I2C Master interface, PLC MAC/PHY layer functions, and Analog Front-End (AFE). Acpanied with Vango’s high-current drive line driver chip (V6000), the V6300 forms a plete modem solution to support all known narrowband PLC Standards. Features - Supporting multiple narrowband PLC Standards: G3-PLC, IEEE P1901.2, PRIME, ITU-T G.hnem; also supporting single-carrier or multi-carrier PLC with FSK or BPSK/DBPSK modulation schemes - With high-linearity and high-current drive line driver (V6000) having integrated receive functions, it offers the lowest BOM cost for G3-PLC/PRIME standards. - Supporting frequency bands: CENELEC, FCC, and ARIB - Supporting modulations: Selectable differential and coherent BPSK, QPSK, 8PSK, and coherent 16QAM - Supporting IPv6 networking layer - Supporting G3-PLC pliant 6Lo WPAN adaptation layer with optimized network formation and mesh routing function - Supporting HW AES-128 - Two UART interfaces (UART0 and UART1). UART1 is high-speed UART supporting up to 500-Kbps baud rate. - One SPI Master with two chip select pins. It can be used to control wireless transceiver, metering, or other SPI devices. - One SPI Slave interface for alternative data interface with Master processor chip - One I2C Master interface to control other I2C devices - 256-KB embedded Flash memory - Supporting In-System Programming (ISP) of Flash memory via UART0 or SPI Slave interface - Up to 32 programmable GPIOs for maximal flexibility - 3.3-V digital I/O. UART pins are 5 V tolerant. - Integrated LDO (3.3 V to 1.2...