Description
The device is CMOS Synchronous Dynamic RAM organized as 8,388,608 - word x 4 -bit x 4 - bank, 4,194,304 - word x 8 - bit x 4 - bank, or 2,097,152 - word x 16 - bit x 4 - bank.
Features
- Single 3.3V ( ± 0.3V) power supply.
- High speed clock cycle time : 7.5ns/10ns.
- Fully synchronous with all signals referenced to a positive clock edge.
- Programmable CAS Iatency (2,3).
- Programmable burst length (1,2,4,8,& Full page).
- Programmable wrap sequence (Sequential/Interleave).
- Automatic precharge and controlled precharge.
- Auto refresh and self refresh modes.
- Quad Internal banks controlled by BA0 & BA1 (Bank s.
VG36128801A Datasheet
