VG4616322B - CMOS Synchronous Graphic RAM

Vanguard International Semiconductor

General Description

Table 1.

Input Clock: CLK is driven by the system clock.

All SGRAM input signals are sampled on the positive edge of CLK.

Key Features

the write per bit and the masked block write functions. By having a programmable Mode register and special mode register, the system can choose the best suitable modes to maximize its performance. These devices are well suited for.

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VG4616322B cmos synchronous graphic ram by Vanguard International Semiconductor - Datasheet Preview

Datasheet Details

Part number	VG4616322B
Manufacturer	Vanguard International Semiconductor
File Size	1.33 MB
Description	CMOS Synchronous Graphic RAM
Datasheet	VG4616322B Datasheet

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VG4616321B	CMOS Synchronous Graphic RAM
VG4632321A	524/288x32x2-Bit CMOS Synchronous Graphic RAM

Full PDF Text Transcription (Reference)

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VIS Overview Preliminary VG4616321B/VG4616322B 262,144x32x2-Bit CMOS Synchronous Graphic RAM The VG4616321(2) SGRAM is a high-speed CMOS synchronous graphics RAM containing 16M bits. It is internally configured as a dual 256K x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 256K x 32 bit banks is organized as 1024 rows by 256 columns by 32 bits. Read and write accesses to the SGRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command.