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VG4632321A - 524/288x32x2-Bit CMOS Synchronous Graphic RAM

General Description

Table 1 shows the details for pin number, symbol, type, and description.

Table 1.

Input Clock: CLK is driven by the system clock.

Key Features

  • the write per bit and the masked block write functions. By having a programmable Mode register and special mode register, the system can choose the best suitable modes to maximize its performance. These devices are well suited for.

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Datasheet Details

Part number VG4632321A
Manufacturer Vanguard International Semiconductor
File Size 1.92 MB
Description 524/288x32x2-Bit CMOS Synchronous Graphic RAM
Datasheet download datasheet VG4632321A Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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VIS Overview Preliminary VG4632321A 524,288x32x2-Bit CMOS Synchronous Graphic RAM The VG4632321A SGRAM is a high-speed CMOS synchronous graphic RAM containing 32M bits. It is internally configured as a dual 512K x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 512K x 32 bit bank is organized as 2048 rows by 256 columns by 32 bits. Read and write accesses to the SGRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command.