SI4900DY Datasheet | Vishay

SPICE Device Model Si4900DY Vishay Siliconix N-Channel 60-V (D-S) MOSFET CHARACTERISTICS - N-Channel Vertical DMOS - Macro Model (Subcircuit Model) - Level 3 MOS - Apply for both Linear and Switching Application - Accurate over the - 55 to 125°C Temperature Range - Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics DESCRIPTION .. The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 to 125°C temperature ranges under the pulsed 0-V to 10-V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device. SUBCIRCUIT MODEL SCHEMATIC This document is intended as a SPICE modeling guideline and does not constitute a mercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Document Number: 73237 S-50392Rev. A, 14-Mar-05 .vishay. 1 SPICE Device Model Si4900DY Vishay Siliconix SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Static Gate Threshold Voltage On-State Drain Current a Symbol Test Condition Simulated Data 2 105 0.046 0.057 16 0.80 Measured Data Unit VGS(th) ID(on) r DS(on) gfs VSD VDS = VGS, ID = 250 µA VDS ≥ 5 V, VGS = 10 V VGS = 10 V, ID = 4.3 A VGS = 4.5 V, ID = 3.9 A VDS = 15 V, ID = 4.3 A IS = 1.7 A, VGS = 0 V V A 0.046 0.059 15 0.80 Ω S V Drain-Source On-State Resistance a Forward Transconductance a .. Diode Forward Voltage a Dynamic...