VSC8115 Description
The VSC8115 functions as a clock and data recovery (CDR) unit for SONET/SDH-based equipment to derive highspeed timing signals. The VSC8115 recovers the clock from the scrambled non-return to zero (NRZ) data operating at 622.08 Mbps (STS-12/OC-12/STM-4) or 155.52 Mbps (STS-3/OC-3/STM-1). After the clock is recovered, the data is retimed using an output flip-flop.
VSC8115 Key Features
- 19.44 MHz reference frequency LVTTL input
- Lock Detect output pin monitors data run length
- Data is retimed at the output
- Active HIGH Signal Detect LVPECL input
- Low jitter, high-speed outputs support LVPECL and low-power LVDS
- Low power: 188 mW typical
- 3.3 V power supply
- 20-pin TSSOP package
- Requires one external capacitor
- PLL bypass operation facilitates board debug