VSC8117 Description
The VSC8117 is an ATM/SONET/SDH-patible transceiver that integrates an on-chip clock multiplication unit (CMU) for the high-speed clock, as well as a clock and data recovery (CDR) unit with 8-bit serial-to-parallel and parallel-to-serial data conversion. The phase-locked loop (PLL) clock is used for serialization in the transmit direction (Mux). The recovered clock is used for deserialization in the receive...
VSC8117 Key Features
- Operates at either STS-3/STM-1 (155.52Mb/s) or STS-12/STM-4 (622.08Mb/s) data rates
- patible with industry ATM UNI devices
- On-chip clock generation of the 155.52MHz
- On-chip clock recovery of the 155.52MHz or
- 8-bit parallel TTL interface
- SONET/SDH frame recovery
- Loss of Signal (LOS) input and LOS detection
- 3.3V/5V programmable PECL serial interface
- Provides Equipment, Facilities, Split Loopback
- Provides TTL and PECL reference clock inputs