Overview: iEthernet W5200 iEthernet W5200 Datasheet
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The W5200 chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier internet connection for embedded systems using SPI (Serial Peripheral Interface). W5200 suits best for users who need Internet connectivity for application that uses a single chip to implement TCP/IP Stack, 10/100 Ethernet MAC and PHY. The W5200 is posed of a fully hardwired market-proven TCP/IP stack and an integrated Ethernet MAC & PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP, and PPPoE, which has been proven in various applications for many years. W5200 uses a 32Kbytes internal buffer as its data munication memory. By using W5200, users can implement the Ethernet application they need by using a simple socket program instead of handling a plex Ethernet Controller. SPI (Serial Peripheral Interface) is provided for easy integration with the external MCU. Using the only 4 pins of SPI to connect with MCU, it is possible to design for small form factor system with the MCU’s I/O pin limit. In order to reduce power consumption of the system, W5200 provides WOL (Wake on LAN) and power down mode. To wake up during WOL, W5200 should be received magic packet, which is the Raw Ethernet packet.
