W5500 - Hardwired TCP/IP embedded Ethernet controller

Product Overview

Datasheet Details

Part number	W5500
Manufacturer	WIZnet
File Size	1.81 MB
Description	Hardwired TCP/IP embedded Ethernet controller
Datasheet	W5500 Datasheet
Additional preview pages of the W5500 datasheet.

Product details

Description

7 HOST Interface 11 2.1 SPI Operation Mode 13 2.2 SPI Frame14 2.2.1 Address Phase14 2.2.2 Control Phase 15 2.2.3 Data Phase 17 2.3 Variable Length Data Mode (VDM) 17 2.3.1 Write Access in VDM 18 2.3.2 Read Access in VDM 21 2.4 Fixed Length Data Mode (FDM) 24 2.4.1 Write Access in FDM25 2.4.2 Read Access in FDM 26 Register and Memory Organization 27 3.1 Common Register Block 29 3.2 Socket Register Block 30 3.3 Memory 31 Register Descriptions 32 4.1 Common

Features

- Supports Hardwired TCP/IP Protocols : TCP, UDP, ICMP, IPv4, ARP, IGMP, PPPoE - Supports 8 independent sockets simultaneously - Supports Power down mode - Supports Wake on LAN over UDP - Supports High Speed Serial Peripheral Interface(SPI MODE 0, 3) - Internal 32Kbytes Memory for TX/RX Buffers - 10BaseT/100BaseTX Ethernet PHY embedded - Supports Auto Negotiation (Full and half duplex, 10 and 100-based ) - Not supports IP Fragmentation - 3.3V operation with 5V I/O signal tolerance - LED outputs.

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Published: Apr 1, 2015 |