WT61P8 Datasheet | Weltrend Semiconductor

WT61P8 v1.01 Flat Panel Display Control Sub-MCU Flat Panel Display Control Sub-MCU Data Sheet Rev. 1.01 April 17, 2008 Copyright Notice This data sheet is copyrighted by Weltrend Semiconductor, Inc. Do not reproduce, transform to any other format, or send/transmit any part of this documentation without the express written permission of Weltrend Semiconductor, Inc. Disclaimers Right to make change - This document provides technical information for user. Weltrend Semiconductor, Inc. reserves the right to make change without further notice to any products herein. Copyright© 2008 Weltrend Semiconductor, Inc. All Rights Reserved. Weltrend reserves right to modify all information contained in this document without notice. Page 1 WT61P8 v1.01 Flat Panel Display Control Sub-MCU REVISION HISTORY V1.01 04/17/2008 This Book 1. Add CEC application circuit on section 7.4 2. Update Electrical characteristics description V1.00 11/26/2007 V0.98 7/16/2007 3. Update DDC/IIC data flow and flow chart on page 34~39. 4. Update electrical characteristic. V0.97 7/3/2007 5. Update DDC/IIC register description, data flow and flow chart on page 34~39. 6. Add product Tube and Tape & Reel specifications 7. Update “MCU clock option diagram” on page 14 V0.96 6/7/2007 8. Add HV sync process block diagram on page 24. 9. Update PWM_CLK description on system level register. 10. Change Flash memory size to 64K from 52K 11. Update SFR register description on page 10~12 12. Update All register map on page41~42 V0.95 5/07/2007 1. Add XTAL_CLK(index 01H-bit2) for XTAL clock divider. 2. Update PWM_CLK description on system level register. 3. Add “WDT[2]” (index08-bit2) for watchdog timer reset pulse selector. 4. Change flash memory size to 52k from 64k. V0.94 4/4/2007 1. Update UART naming 2. Add RTC block diagram in chapter 4.14 3. Update system reset description. V0.93 2/8/2007 1. Update T2CON register on page 12. 2. Add interrupt flow chart on page 20. V0.92 2/5/2007 1. Update memory...