EDI8F8512C Datasheet | White Electronic Designs Corporation

FEATURES - 512Kx8 bit CMOS Static - Random Access Memory - Access Times 20 through 100ns - Data Retention Function (EDI8F8512LP) - TTL patible Inputs and Outputs - Fully Static, No Clocks - High Density Packaging .. DESCRIPTION The EDI8F8512C is a 4096K bit CMOS Static RAM based on four 128Kx8 or 256Kx4 (high speed) Static RAMs mounted on a multilayered epoxy laminate (FR4) substrate. Functional equivalence to the monolithic four megabit Static RAM is achieved by utilization of an on-board decoder that interprets the higher order address(es) to select one of the128Kx8 or 256Kx4 Static RAMs. The 32 pin DIP pinout adheres to the JEDEC standard for the four megabit device, to ensure patibility with future monolithics. A low power version with data retention (EDI8F8512LP) is also available. All inputs and outputs are TTL patible and operate from a single 5V supply. Fully asynchronous, the EDI8F8512C requires no clocks or refreshing for operation. - 36 Pin SIP, No. 63 - 32 Pin DIP, JEDEC Pinout, No. 91 (55-100ns) - 32 Pin DIP, JEDEC Pinout, No. 183 (20-35ns) - Single +5V (±10%) Supply Operation - This product is subject to change without notice. FIG. 1 PIN CONFIGURATIONS NC VCC W# DQ2 DQ3 DQ0 A1 A2 A3 A4 VSS DQ5 A10 A11 A5 A13 A14 NC E# A15 A16 A12 A18 A6 DQ1 VSS A0 A7 A8 A9 DQ7 DQ4 DQ6 A17 VCC G# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 8F8512C Pin Config. A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 8F8512C Pin Config 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 A17 W# A13 A8 A9 A11 G# A10 E# DQ7 DQ6 DQ5 DQ4 DQ3 PIN NAMES A0-A18 E# W# G# DQ0-DQ7 VCC VSS NC Address Inputs Chip Enable Write Enable Output Enable mon Data Input/Output Power (+5V±10%) Ground No Connection White Electronic Designs Corp. reserves the right to change products or specifications without notice. July 2002 Rev. 13A 1 White Electronic Designs Corporation -...