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WED8L24258V - Asynchronous SRAM

Datasheet Summary

Description

The WED8L24258VxxBC is a 3.3V, twelve megabit SRAM constructed with three 256Kx8 die mounted on a multi-layer laminate substrate.

Features

  • n 256Kx24 bit CMOS Static n Random Access Memory Array • Fast Access Times: 10, 12, and 15ns • Master Output Enable and Write Control • Three Chip Enables for Byte Control • TTL Compatible Inputs and Outputs • Fully Static, No Clocks n Surface Mount Package • 119 Lead BGA (JEDEC MO-163), No. 391 • Small Footprint, 14mmx22mm • Multiple Ground Pins for Maximum Noise Immunity n Single +3.3V (±5%) Supply Operation n DSP Memory Solution • Motorola DSP5630x • Analog Devices.

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Datasheet Details

Part number WED8L24258V
Manufacturer White Electronic Designs
File Size 468.94 KB
Description Asynchronous SRAM
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www.DataSheet4U.com WED8L24258V Asynchronous SRAM, 3.3V, 256Kx24 FEATURES n 256Kx24 bit CMOS Static n Random Access Memory Array • Fast Access Times: 10, 12, and 15ns • Master Output Enable and Write Control • Three Chip Enables for Byte Control • TTL Compatible Inputs and Outputs • Fully Static, No Clocks n Surface Mount Package • 119 Lead BGA (JEDEC MO-163), No. 391 • Small Footprint, 14mmx22mm • Multiple Ground Pins for Maximum Noise Immunity n Single +3.3V (±5%) Supply Operation n DSP Memory Solution • Motorola DSP5630x • Analog Devices SHARCTM The JEDEC Standard 119 lead BGA provides a 69% space savings over using six 256Kx4, 300 mil wide SOJs and the BGA package has a maximum height of 110 mils compared to 148 mils for the SOJ packages.
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