WV3EG128M72EFSR-D3 Datasheet | White Electronic Designs

FEATURES Double-data-rate architecture DDR266 and DDR333 - JEDEC design specifications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2,5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input Auto and self refresh Serial presence detect Power Supply: - VCC = VCCQ = +2.5V ±0.2V (100, 133 and 166MHz) 184 pin DIMM package PCB height: - D3: 29.97mm (1.18") NOTE: Consult factory for availability of: - Lead-Free Products - Vendor source control options .. - Industrial temperature options - This product is under development, is not qualified or characterized and is subject to change or cancellation without notice. DESCRIPTION The WV3EG128M72EFSR is a 128Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM ponent. The module consists of eighteen 64Mx8 DDR ponents in FBGA packages mounted on a 184 Pin FR4 substrate. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lenths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. OPERATING FREQUENCIES DDR333 @CL=2.5 Clock Speed CL-t RCD-t RP 166MHz 2.5-3-3 DDR266 @CL=2 133MHz 2-2-2 DDR266 @CL=2.5 133MHz 2.5-3-3 March 2005 Rev. 0 White Electronic Designs Corporation - (602) 437-1520 - .wedc. White Electronic Designs ADVANCED PIN CONFIGURATION PIN SYMBOL PIN SYMBOL DQS8 A0 CB2 VSS CB3 BA1 DQ32 VCCQ DQ33 DQS4 DQ34 VSS BA0 DQ35 DQ40 VCCQ WE# DQ41 CAS# VSS DQS5 DQ42 DQ43 VCC NC DQ48 DQ49 VSS NC NC VCCQ DQS6 DQ50 DQ51 VSS VCCID DQ56 DQ57 VCC DQS7 DQ58 DQ59 VSS NC SDA SCL PIN 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 SYMBOL VSS DQ4 DQ5 VCCQ DM0/DQS9 DQ6 DQ7 VSS NC NC NC VCCQ DQ12...