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XC95108 - XC95108 In-System Programmable CPLD

Datasheet Summary

Description

The XC95108 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration.

It is comprised of six 36V18 Function Blocks, providing 2,400 usable gates with propagation delays of 7.5 ns.

See Figure 2 for the architecture overview.

Features

  • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 108 macrocells with 2400 usable gates Up to 108 user I/O pins 5 V in-system programmable (ISP) - Endurance of 10,000 program/erase cycles - Program/erase over full commercial voltage and temperature range Enhanced pin-locking architecture Flexible 36V18 Function Block - 90 product terms drive any or all of 18 macrocells within Function Block - Global and product term clocks, output enable.

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Datasheet Details

Part number XC95108
Manufacturer Xilinx
File Size 108.96 KB
Description XC95108 In-System Programmable CPLD
Datasheet download datasheet XC95108 Datasheet
Additional preview pages of the XC95108 datasheet.

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Full PDF Text Transcription

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1 ® XC95108 In-System Programmable CPLD 1 1* December 4, 1998 (Version 3.0) Product Specification Features • • • • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz 108 macrocells with 2400 usable gates Up to 108 user I/O pins 5 V in-system programmable (ISP) - Endurance of 10,000 program/erase cycles - Program/erase over full commercial voltage and temperature range Enhanced pin-locking architecture Flexible 36V18 Function Block - 90 product terms drive any or all of 18 macrocells within Function Block - Global and product term clocks, output enables, set and reset signals Extensive IEEE Std 1149.
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