XCR3064A
Description
The XCR3064A CPLD (plex Programmable Logic Device) is the second in a family of CoolRunner™ CPLDs from Xilinx.
Key Features
- Industry's first TotalCMOS™ PLD - both CMOS design and process technologies
- Fast Zero Power (FZP™) design technique provides ultra-low power and very high speed
- High speed pin-to-pin delays of 7.5 ns
- Ultra-low static power of less than 100 µA
- 5V tolerant I/Os to support mixed Voltage systems
- 100% routable with 100% utilization while all pins and all macrocells are fixed
- Deterministic timing model that is extremely simple to use
- Up to 12 clocks with programmable polarity at every macrocell
- Support for plex asynchronous clocking
- Innovative XPLA™ architecture bines high speed with extreme flexibility
