| Part number | PDSP16116A |
|---|---|
| Manufacturer | Zarlink Semiconductor |
| File Size | 174.85 KB |
| Description | 16 by 16 Bit Complex Multiplier |
| Datasheet |
 PDSP16116A Datasheet
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| Note |
This datasheet PDF includes multiple part numbers: PDSP16116A, PDSP16116. Please refer to the document for exact specifications by model. |
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16 bit input for real x data 16 bit input for imag x data 16 bit input for reaal y data 16 bit input for imag y data 16 bit output for real p data 16 bit output for img p data Clock, new data is loaded on rising edge of CLK Clock, enable X-port input register Clock, enable Y-port input register Conjugate X data Conjugate Y data Rounds the real & imag results Mode select (BFP/Normal) Start of BFP operations End of pass 3 MSB's from real part of A-word 3 MSB's from
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