ZL30146 Datasheet | Zarlink Semiconductor

.. ZL30146 Sync E SONET/SDH Line Card PLL Short Form Data Sheet Features - Synchronizes to standard tele or Ethernet backplane clocks and provides jitter filtered output clocks for SONET/SDH, PDH and Ethernet network interface cards Supports the requirements of ITU-T G.8262 for synchronous Ethernet Equipment slave Clocks Meets the SONET/SDH jitter generation requirements up to OC-192/STM-64 Two independent DPLLs provides timing for the transmit path (backplane to line rate) and the receive path (recovered line rate to backplane) Synchronizes to tele reference clocks (2 k Hz, N- 8 k Hz up to 77.76 MHz, 155.52 MHz) or to Ethernet reference clocks (25 MHz, 50 MHz, 62.5 MHz, 125 MHz) Selectable loop bandwidth of 14 Hz, 28 Hz, 890 Hz, 3.5 Hz, 1.7 Hz, or 0.1 Hz Supports automatic hitless reference switching and short term holdover during loss of reference inputs Generates standard SONET/SDH clock rates (e.g., 19.44 MHz, 38.88 MHz, 77.76 MHz, 155.52 MHz, 622.08 MHz) or Ethernet clock rates (e.g., 25 MHz, 50 MHz, 125 MHz, 156.25 MHz, 312.5 MHz) for synchronizing Ethernet PHYs - Ordering Information February 2009 ZL30146GGG 64 Pin CABGA Trays ZL30146GGG2 64 Pin CABGA- Trays - Pb Free Tin/Silver/Copper -40o C to +85o C Programmable output synthesizer to generate tele clock frequencies from any multiple of 8 k Hz up to 100 MHz (e.g., T1/E1, DS3/E3) Generates several styles of output frame pulse with selectable pulse width, polarity, and frequency Configurable input to output delay and output to output phase alignment Configurable through a serial interface (SPI or I2C) DPLLs can be configured to provide synchronous or asynchronous clock outputs - - - - - - - - - - - Applications - - ITU-T G.8262 Line Cards which support 1 Gb E and 10 Gb E interfaces SONET/SDH line cards up to OC-192/STM-64 osci osco ref0 ref1 ref2 ref3 ref4 Input Ports sync0 ref m Rx DPLL Program m able Synthesizer N- 8k Hz p_clk p_fp ref n /sync n Tx DPLL Ref/Sync...