ZL50411 Overview
ZL50411 Managed 9FE Layer-2 Ethernet Switch .. Data Sheet Zarlink Features April 2006 **Pb Free Tin/Silver/Copper -40° C to +85 ° C • • • Built-in reset logic triggered by system malfunction Built-In Self Test for internal SRAM IEEE-1149.1 (JTAG) test port • • L2 Switching • L2 switching • MAC address self learning, up to 4 K MAC addresses • MAC address table supports unicast and multicast MAC address and IP multicast address learning Supports IP Multicast with IGMP snooping, up to 4 K IP Multicast groups • • C P U 8/16-bit or Serial ZL50411 MII MII 9-Port 10/100M Ethernet Switch Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003-2006, Zarlink Semiconductor Inc. All Rights Reserved. ZL50411 • Supports the following spanning standards • IEEE 802.1D spanning tree • IEEE 802.1w rapid spanning tree Supports...
ZL50411 Key Features
- Integrated Single-Chip 10/100 Mbps Ethernet Switch
- Eight 10/100 Mbps auto-negotiating Fast Ethernet (FE) ports with RMII, MII, GPSI, Reverse MII & Reverse GPSI interface o
- One 10/100 Mbps auto-negotiating port with MII interface option, that can be used as a WAN uplink or as a 9th port
- a 10/100 Mbps Fast Ethernet (FE) CPU port with Reverse MII interface option Embedded 2.0 Mbits (256 KBytes) internal mem
- Supports jumbo frames up to 4 KBytes CPU access supports the following interface options
- 8/16-bit ISA interface
- Serial interface with MII port; remended for light management
- Serial interface in lightly managed mode, or in unmanaged mode with optional I2C EEPROM interface Ethernet IEEE 802.3x f
- Pb Free Tin/Silver/Copper -40° C to +85 ° C
- Built-in reset logic triggered by system malfunction Built-In Self Test for internal SRAM IEEE-1149.1 (JTAG) test port