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A2V64S40CTP - 64Mb Synchronous DRAM

Description

The A2V64S40CTP is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by 16 bits.

Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on every clock cycle.

Features

  • 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS latency (2 & 3) - Burst length (1, 2, 4, 8 & Full page) - Burst type (Sequential & Interleave).
  • All inputs are sampled at the positive going edge of the system clock Auto & self refresh 64ms refresh period (4K cycle) Burst read single write operation LDQM & UDQM for masking Pin Conf.

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Datasheet Details

Part number A2V64S40CTP
Manufacturer Zentel Electronics
File Size 730.92 KB
Description 64Mb Synchronous DRAM
Datasheet download datasheet A2V64S40CTP Datasheet
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A2V64S40CTP 64M Single Data Rate Synchronous DRAM 64Mb Synchronous DRAM Specification A2V64S40CTP www.DataSheet.co.kr Zentel Electronics Corp. 6F-1, No. 1-1, R&D Rd. II, Hsin Chu Science Park, 300 Taiwan, R.O.C. TEL:886-3-579-9599 FAX:886-3-579-9299 Revision 2.1 Sep., 2008 Datasheet pdf - http://www.DataSheet4U.net/ A2V64S40CTP 64M Single Data Rate Synchronous DRAM General Description The A2V64S40CTP is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by 16 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on every clock cycle.
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