UL62H256A Description
go High-Z until the new information is available. The data outputs have no preferred state. The Read cycle is finished by the falling edge of W, or by the rising edge of E, respectively.
UL62H256A Key Features
- Standby ! Three-state outputs
- Data Retention ! Typ. operating supply current The memory array is based on a 35 ns: 45 mA 6-Transistor cell. 55 ns: 30