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ZVP3310A - P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET

Key Features

  • 100 Volt VDS.
  • RDS(on)=20Ω ZVP3310A D G S.

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Full PDF Text Transcription for ZVP3310A (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for ZVP3310A. For precise diagrams, and layout, please refer to the original PDF.

P-CHANNEL ENHANCEMENT MODE VERTICAL DMOS FET ISSUE 2 – MARCH 94 FEATURES * 100 Volt VDS * RDS(on)=20Ω ZVP3310A D G S ABSOLUTE MAXIMUM RATINGS. PARAMETER Drain-Source Volt...

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Ω ZVP3310A D G S ABSOLUTE MAXIMUM RATINGS. PARAMETER Drain-Source Voltage Continuous Drain Current at Tamb=25°C Pulsed Drain Current Gate Source Voltage Power Dissipation at Tamb=25°C Operating and Storage Temperature Range SYMBOL VDS ID IDM VGS Ptot Tj:Tstg E-Line TO92 Compatible VALUE -100 -140 -1.2 ± 20 UNIT V mA A V mW °C 625 -55 to +150 ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated). PARAMETER Drain-Source Breakdown Voltage Gate-Source Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current(1) SYMBOL MIN. BVDSS VGS(th) IGSS IDSS ID(on) -300 20 50 50 15 5 8 8 8 8

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