Datasheet Summary
- 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
- Inputs Are TTL-Voltage patible
- Flow-Through Architecture Optimizes
PCB Layout
- Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise t- EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process
- 500-mA Typical Latch-Up Immunity at 125°C
- Package Options Include Plastic Small-
Outline Packages, Plastic Shrink Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description
These octal buffers or line drivers are designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receivers...