54ACT11827 Datasheet | Texas Instruments

- Inputs Are TTL-Voltage patible - 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers - Flow-Through Architecture to Optimize PCB Layout - Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise t- EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process - 500-m A Typical Latch-Up Immunity at 125°C - Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Ceramic 300-mil DIPs description These 10-bit buffers/bus drivers provide highperformance bus interface for wide data paths or buses carrying parity. The 3-state control gate is a 2-input NOR such that if either G1 or G2 is high, all ten outputs are in the high-impedance state. The ′ACT11827 provides inverted data. The 54ACT11827 is characterized for operation over the full military temperature range of - 55°C to 125°C. The 74ACT11827 is characterized for operation from - 40°C to 85°C. FUNCTION TABLE INPUTS G1 G2 A OUTPUT Y L LH Y5 GND GND GND GND Y6 Y7 54ACT11827, 74ACT11827 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS SCAS078 - NOVEMBER 1989 - REVISED APRIL 1993 54ACT11827 . . . JT PACKAGE 74ACT11827 . . . DW...