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74AC11010 - TRIPLE 3-INPUT POSITIVE-NAND GATES

General Description

These devices contain three independent 3-input NAND gates.

They perform the Boolean functions Y = A S B S C or Y = A + B + C in positive logic.

55°C to 125°C.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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• Flow-Through Architecture Optimizes PCB Layout • Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise • EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process • 500-mA Typical Latch-Up Immunity at 125°C • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These devices contain three independent 3-input NAND gates. They perform the Boolean functions Y = A S B S C or Y = A + B + C in positive logic. The 54AC11010 is characterized for operation over the full military temperature range of – 55°C to 125°C. The 74AC11010 is characterized for operation from – 40°C to 85°C. 54AC11010, 74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCLS057 – MAY 1987 – REVISED APRIL 1993 54AC11010 . . .