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D 3-State Outputs Drive Bus Lines Directly D Flow-Through Architecture Optimizes
PCB Layout
D Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, and Standard Plastic 300-mil
DIPs (NT)
74AC11245 OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS010B – JULY 1987 – REVISED APRIL 1996
DB, DW, NT, OR PW PACKAGE (TOP VIEW)
A1 A2 A3 A4 GND GND GND GND A5 A6 A7 A8
1 2 3 4 5 6 7 8 9 10 11 12
24 DIR
23 B1
22 B2
21 B3
20 B4 19 VCC 18 VCC 17 B5 16 B6 15 B7 14 B8 13 OE
description
This octal bus transceiver is designed for asynchronous two-way communica