74ACT11543 Overview
This 8-bit registered transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch enable (LEAB or LEBA) and output enable (GAB or GBA) inputs are provided for each register to permit independent control in either direction of data flow. Having CEAB low and LEAB low makes the A-to-B latches transparent;.