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74F377A - OCTAL D-TYPE FLIP-FLOP

General Description

The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs.

Key Features

  • a latched clock enable (CE) input. Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if CE is low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the CE input. Th.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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• Contains Eight D-Type Flip-Flops With Single-Rail Outputs • Clock Enable Latched to Avoid False Clocking • Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators • Buffered Common Enable Input • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs SN74F377A OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE SDFS018D – D2932, MARCH 1987 – REVISED OCTOBER 1993 DW OR N PACKAGE (TOP VIEW) CE 1 1Q 2 1D 3 2D 4 2Q 5 3Q 6 3D 7 4D 8 4Q 9 GND 10 20 VCC 19 8Q 18 8D 17 7D 16 7Q 15 6Q 14 6D 13 5D 12 5Q 11 CLK description The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable (CE) input.