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ADC10040Q - 10-Bit 40MSPS 3V 55.5mW A/D Converter

Download the ADC10040Q datasheet PDF. This datasheet also covers the ADC10040 variant, as both devices belong to the same 10-bit 40msps 3v 55.5mw a/d converter family and are provided as variant models within a single manufacturer datasheet.

General Description

The ADC10040 is a monolithic CMOS analog-todigital converter capable of converting analog input signals into 10-bit digital words at 40 Megasamples per second (MSPS).

Key Features

  • 1.
  • 2 Single +3.0V Operation.
  • Selectable 2.0 VP-P, 1.5 VP-P, or 1.0 VP-P full- scale input swing.
  • 400 MHz.
  • 3 dB Input Bandwidth.
  • Low Power Consumption.
  • Standby Mode.
  • On-Chip Reference and Sample-and-Hold Amplifier.
  • Offset Binary or Two’s Complement Data Format.
  • Separate Adjustable Output Driver Supply to Accommodate 2.5V and 3.3V Logic Families.
  • AEC-Q100 Grade 3 Qualified.
  • 28-Pin TSSOP Package KEY SPE.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ADC10040-etcTI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by Texas Instruments

Part Number Description
ADC10040 10-Bit 40MSPS 3V 55.5mW A/D Converter
ADC10065 10-Bit 65MSPS 3V A/D Converter
ADC10080 10-Bit 80MSPS 3V 78.6mW A/D Converter
ADC101C021 I2C-Compatible 10-Bit ADC
ADC101C027 I2C-Compatible 10-Bit ADC

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ADC10040 www.ti.com SNAS224M – JULY 2003 – REVISED APRIL 2013 ADC10040/ADC10040Q 10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter Check for Samples: ADC10040 FEATURES 1 •2 Single +3.0V Operation • Selectable 2.0 VP-P, 1.5 VP-P, or 1.0 VP-P full- scale input swing • 400 MHz −3 dB Input Bandwidth • Low Power Consumption • Standby Mode • On-Chip Reference and Sample-and-Hold Amplifier • Offset Binary or Two’s Complement Data Format • Separate Adjustable Output Driver Supply to Accommodate 2.5V and 3.3V Logic Families • AEC-Q100 Grade 3 Qualified • 28-Pin TSSOP Package KEY SPECIFICATIONS • Resolution: 10 Bits • Conversion Rate: 40 MSPS • Full Power Bandwidth: 400 MHz • DNL: ±0.3 LSB typ) • SNR (fIN = 11 MHz): 59.6 dB (typ) • SFDR (fIN = 11 MHz): -80 dB (typ) • Power Consumption, 40 MHz: 55.