Datasheet4U Logo Datasheet4U.com

ADC10DV200 - Dual 10-bit 200MSPS Low-Power A/D Converter

General Description

The ADC10DV200 is a monolithic analog-to-digital converter capable of converting two analog input signals into 10-bit digital words at rates up to 200 Mega Samples Per Second (MSPS).

The digital output mode is selectable and can be either differential LVDS or CMOS signals.

Key Features

  • 1.
  • 2 Single 1.8V Power Supply Operation.
  • Power Scaling with Clock Frequency.
  • Internal Sample-and-Hold.
  • Internal or External Reference.
  • Power Down Mode.
  • Offset Binary or 2's Complement Output Data Format.
  • LVDS or CMOS Output Signals.
  • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch).
  • Clock Duty Cycle Stabilizer.
  • IF Sampling Bandwidth > 900MHz. KEY.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
ADC10DV200 200 MSPS Low-Power A/D Converter National Semiconductor Corporation
ADC10D020 Dual 10-Bit/ 20 MSPS/ 150 mW A/D Converter National Semiconductor
ADC10D040 A/D Converter National Semiconductor
ADC10D1000 Dual 1.0/1.5 GSPS Or Single 2.0/3.0 GSPS ADC National Semiconductor Corporation
ADC10D1500 Dual 1.0/1.5 GSPS Or Single 2.0/3.0 GSPS ADC National Semiconductor Corporation

Other Datasheets by Texas Instruments

Part Number Description
ADC10D020 150mW A/D Converter
ADC10D040 267mW A/D Converter
ADC10D1000 10-Bit Dual ADC
ADC10D1000QML-SP Low-Power 10-Bit Dual 1-GSPS or Single 2-GSPS Analog-to-Digital Converter
ADC10D1500 10-Bit Dual ADC

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
ADC10DV200 www.ti.com SNAS471A – FEBRUARY 2009 – REVISED APRIL 2013 ADC10DV200 Dual 10-bit, 200 MSPS Low-Power A/D Converter with Parallel LVDS/CMOS Outputs Check for Samples: ADC10DV200 FEATURES 1 •2 Single 1.8V Power Supply Operation. • Power Scaling with Clock Frequency. • Internal Sample-and-Hold. • Internal or External Reference. • Power Down Mode. • Offset Binary or 2's Complement Output Data Format. • LVDS or CMOS Output Signals. • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch) • Clock Duty Cycle Stabilizer. • IF Sampling Bandwidth > 900MHz. KEY SPECIFICATIONS • Resolution 10 Bits • Conversion Rate 200 MSPS • ENOB 9.6 bits (typ) @Fin=70 MHz • SNR 59.9 dBFS (typ) @Fin=70 MHz • SINAD 59.