Download ADC128S102QML-SP Datasheet PDF
ADC128S102QML-SP page 2
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ADC128S102QML-SP Description

The ADC128S102 device is a low-power, eightchannel CMOS 12-bit analog-to-digital converter specified for conversion throughput rates of 50 kSPS to 1 MSPS. The converter is based on a successiveapproximation register architecture with an internal track-and-hold circuit. The device can be configured to accept up to eight input signals at inputs IN0 through IN7.

ADC128S102QML-SP Key Features

  • 1 5962R07227
  • Total Ionizing Dose 100 krad(Si)
  • Single Event Latch-Up Immune 120 MeVcm2/mg
  • Single Event Functional Interrupt Immune 120 MeV-cm2/mg (See Radiation Report)
  • Eight Input Channels
  • Variable Power Management
  • Independent Analog and Digital Supplies
  • SPI™/QSPI™/MICROWIRE™/DSP patible
  • Packaged in 16-Lead Ceramic SOIC
  • Key Specifications