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ADC31JB68 Datasheet PDF

Texas Instruments ADC31JB68

The ADC31JB68 is a low-power, wide-bandwidth, 16bit, 500-MSPS analog-to-digital converter (ADC). The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. This device is designed to sample input signals of up to 1.3 GHz.
Part No. ADC31JB68
Datasheet ADC31JB68 Download
Manufacturer
Texas Instruments
Description Analog-to-Digital Converter
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ADC31JB68 datasheet page 1 preview

FEATURES

●1 Single Channel
● 16-Bit Resolution
● Maximum Clock Rate: 500 Msps
● Small 40-Pin QFN Package (6 x 6 mm)
● Input Buffer Input Bandwidth (3 dB): 1300 MHz
● Aperture Jitter: 80 fs
● On Chip Clock Divider: /1, /2, /4
● On Chip Dither
● Consistent Dynamic Performance Using Foreground and Background Calibration
● Input Amplitude and Phase Adjustment
● Input Full Scale: 1.7 Vpp
● Power Supplies: 1.2/1.8/3 V
● JESD204B Interface – Subclass 1 Compliant – 2 Lanes at 5 Gbps
● Support for Multi-chip Synchronization
● Key Specifications – Power Dissipation: 915 mW at 500 Msps – Performance at fin = 210 MHz at –1 dBFS – SNR: 69.3 dBFS – NSD: –153.3 dBFS/Hz – SFDR: 80 dBc – Non-HD2,HD3: –91 dBFS – Performance at fin = 450 MHz at –1 dBFS – SNR: 67 dBFS – NSD: –151 dBFS/Hz – SFDR: 77 dBc HD2,3 – Non-HD2,HD3: –89 dBFS Transmitted Eye at Output of 18-Inch, 5-mil. FR4 Microstrip Trace at 5 Gb/s With Optimized De-Emphasis 1 2

APPLICATIONS

● High IF Sampling Receivers
● Broadband Wireless
● Micr...
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