ADC3241 Overview
The ADC324x are a high-linearity, ultra-low power, dual-channel, 14-bit, 25-MSPS to 125-MSPS, analogto-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables plete system synchronization.
ADC3241 Key Features
- 1 Dual Channel
- 14-Bit Resolution
- Single Supply: 1.8 V
- Serial LVDS Interface (SLVDS)
- Flexible Input Clock Buffer with Divide-by-1, -2, -4
- SNR = 72.4 dBFS, SFDR = 87 dBc at
- Ultra-Low Power Consumption
- 116 mW/Ch at 125 MSPS
- Channel Isolation: 105 dB
- Internal Dither and Chopper